Without limiting the scope of the invention, its background is described in connection with substrate bias voltage generators for dynamic random access memories (DRAMs) and other semiconductor devices, as an example.
DRAMs, as well as other types of semiconductor devices, are often provided with both an active mode and a standby mode of operation. Power consumption in the standby mode is reduced with respect to that in the active mode to increase efficiency during periods of time in which the device is powered up but idle.
One method to reduce power consumption in the standby mode is to reduce the frequency of operation of various circuits, such as substrate bias voltage generators, that must continually operate while the device is powered up. This method requires dual oscillator frequencies: a higher frequency to drive the circuits at full speed during operation in the active mode, and a lower frequency to drive the circuits at a slower speed, thereby reducing the power consumed by the circuits, during operation in the standby mode.
FIG. 1 shows a substrate bias voltage generator 10 according to the prior art that operates at dual frequencies. As is well known, substrate bias voltage generators are used to bias the substrates of DRAMs and other semiconductor devices to a negative voltage in order to improve performance of the semiconductor device. Substrate bias voltage generator 10 includes a first oscillator 14 and a first charge pump 16 for biasing substrate node 11 when the semiconductor device is operating in the active mode. Substrate bias voltage generator 10 also includes a second oscillator 18 and a second charge pump 20 for biasing substrate node 11 when the semiconductor device is operating in the standby mode.
Oscillator 18 has an input for receiving a SELECT signal while oscillator 14 has an input for receiving an inverted SELECT signal via inverter 12. In the standby mode, the SELECT signal has a high state to activate oscillator 18 and inactivate oscillator 14. Oscillator 18, when activated, supplies an output signal having a first frequency f1 to charge pump 20. Charge pump 20 biases substrate node 11 in response to the output signal from oscillator 18.
In the active mode, the SELECT signal has a low state to inactivate oscillator 18 and activate oscillator 14. Oscillator 14, when activated, supplies an output signal having a second frequency f2, that is greater than f1, to charge pump 16. Charge pump 16 biases substrate node 11 in response to the output signal from oscillator 14.
While substrate bias voltage generator 10 is capable of operating at dual frequencies to reduce standby power consumption, the cost is a relatively large amount of silicon area since two separate oscillators and two separate charge pumps are required.
FIG. 2 shows a second substrate bias voltage generator 22 according to the prior art that operates at dual frequencies. Substrate bias voltage generator 22 includes a first oscillator 24 that supplies an output signal having a first frequency f1 to select circuit 28 and a second oscillator 26 that supplies an output signal having a second frequency f2, that is greater than f1, to select circuit 28. Select circuit 28 selectively couples the output signal of oscillator 24 or the output signal of oscillator 26 to charge pump 30 in response to a SELECT signal. Charge pump 30 generate a bias voltage in response to the signal received from select circuit 28.
In the standby mode, the SELECT signal has a first state causing select circuit 28 to couple the output of oscillator 24 to charge pump 30. Charge pump 30 biases substrate node 21 in response to the output signal from oscillator 24.
In the active mode, the SELECT signal has a second state causing select circuit 28 to couple the output of oscillator 26 to charge pump 30. Charge pump 30 biases substrate node 21 in response to the output signal from oscillator 26.
While substrate bias voltage generator 22 is capable of operating at dual frequencies to reduce standby power consumption, the cost is a relatively large amount of silicon area since two separate oscillators and a select circuit are required.
FIG. 3 shows a third substrate bias voltage generator 32 according to the prior art that operates at dual frequencies. Substrate bias voltage generator 32 includes an oscillator 34 that supplies an output signal having a first frequency f2 to select circuit 38 and to frequency divider 36. Frequency divider 36 supplies an output signal having a second frequency f1, that is less than f2, to select circuit 38. Select circuit 38 selectively couples the output signal of oscillator 34 or the output signal of frequency divider 36 to charge pump 40 in response to a SELECT signal. Charge pump 40 generate a bias voltage in response to the signal received from select circuit 38.
In the standby mode, the SELECT signal has a first state causing select circuit 38 to couple the output of frequency divider 36 to charge pump 40. Charge pump 40 biases substrate node 31 in response to the output signal from frequency divider 36.
In the active mode, the SELECT signal has a second state causing select circuit 38 to couple the output of oscillator 34 to charge pump 40. Charge pump 40 biases substrate node 31 in response to the output signal from oscillator 34.
While substrate bias voltage generator 32 is capable of operating at dual frequencies to reduce standby power consumption, the cost is a relatively large amount of silicon area since a frequency divider and select circuit are required. In addition, the reduction in power consumption is compromised to some extent by the power required to operate frequency divider 36.